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Home arrow News arrow Latest arrow Matsushita, Renesas enter testing on 45nm

Matsushita, Renesas enter testing on 45nm PDF Print E-mail
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 Matsushita, Renesas enter testing on 45nm


EE Times

TOKYO — Renesas Technology Corp., and Matsushita Electric Industrial Co. Ltd. have advanced their collaboration in 45nm process development into a full integration test stage.

The R&D team at Renesas' Itami labs has already installed the ArF immersion system with a numerical aperture (N.A.) of more than 1.0., declining to disclose the supplier, and employing it for the logic process.

"We believe that we one-up competitors in actually applying NA 1.0 immersion technology to 45nm system-on-chip LSIs," said a Renesas spokesman.

Matsushita and Mitsubishi Electric Corp. started joint process development back in 1998. The collaboration was taken over by Renesas after Mitsubishi and Hitachi merged semiconductor operations to form Renesas. Through the joint R&D work, 130 nm, 90nm and 65 nm processes have been developed.

The collaboration for 45nm process started last October. Executives of each company suggested the process collaboration extend to 45nm node. The two companies, however, avoided making an official announcement because of an ongoing attempt at the time to establish a joint foundry between Renesas, Hitachi, and Toshiba that eventually failed.

The R&D team intends to introduce other new technologies, such as introduced-strain silicon and ELK multilayer wiring module, a copper wiring technology using interlayer insulation films with low relative permittivity, into their 45nm process technology.

The 45nm process development is slated to finish by Fall 2007. Each company will prepare to begin volume production based on 45nm process technology in fiscal 2008 starting April of that year.

Toshiba, Sony and NEC Electronics formed another R&D team in Japan to develop 45nm process technology.

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